> saw that. but the argument has been pretty apparent for a while i think. eg
> Alpha's are supposed to be the epitome of current "RISC". Yet they have a
> pretty hefty microcode layer, PALcode, through which you access the cpu. ie
> Alpha instructions are really PALcode functions.
IIRC, the PALcode is more like "here are commonly used
subroutines that are used by the OS, let's shove them right
down into the CPU itself". Different OSes load different PALcode
at boot time.
I guess that it's done to avoid the overhead of a full-blown
interrupt or exception to handle certain things. For example,
VMS on Alpha uses PALcode to help implement ASTs,
for which there was hardware support in the VAX architecture.
Alpha instructions themselves are _not_ implemented in
PALcode. PALcode is written in Alpha instructions and
called via some sort of CallPALRoutine instruction.
Must get my hands on an Alpha Architecture Manual...
Paul, got any lying around the office that nobody wants?? :-)
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