On Fri, Jan 07, 2000 at 08:34:01AM +0000, Vincent Cunniffe mentioned:
> > I think that they have some kind of work around
> > for Multi-Sparc boxes so perhaps Solaris for X86 can handle it.
> > Or is it a mobo issue ?
> Sparcs were always designed for MP systems ;-)
>> The 80x86 world has always been a lot clumsier, and workarounds
> for stuff like interrupts are pretty complicated, and (as I
> understand it) interfere badly with other hardware aspects such
> as power management.
I thought they re-wrote the book for SMP systems on Intel. That's why it
rocks so much :)
xena [0] cat /proc/interrupts
CPU0 CPU1
0: 4186169 4160816 IO-APIC-edge timer
1: 72686 72444 IO-APIC-edge keyboard
2: 0 0 XT-PIC cascade
9: 0 0 IO-APIC-edge acpi
12: 460479 460847 IO-APIC-edge PS/2 Mouse
13: 1 0 XT-PIC fpu
15: 83377 82605 IO-APIC-edge ide1
16: 462957 464316 IO-APIC-level es1371
18: 531573 531831 IO-APIC-level ide2, eth0
NMI: 8346927 8346927
LOC: 8345909 8345910
ERR: 1
Kick ass. Loads of interrupts, and loads of space!
Kate
--
Microsoft. The best reason in the world to drink beer.
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