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[ILUG] Serial port

[ILUG] Serial port

Pádraig Brady P at draigBrady.com
Tue Apr 4 14:39:28 IST 2006


shanebkennedy at eircom.net wrote:

>Hi, Y'all, and thanks for the help last time round.  I have another problem
>... same project, also ttyS* related...the o/p defaults to low, so the
>other device doesn't see a start bit !, just the data bits.  Any
>suggestions ?
>  
>
That's a bit low level. I don't think software has control
over the UART in this regard? How are you measuring this?

Note RS232 uses inverted logic wrt the data pins only.
So +12V = logical 0 (start), while -12V = logical 1 (stop).
A line will transition from -12 to +12 for the start bit,
and stay at -12 when nothing is being transmitted.

What higher level settings are you using?
Have you set CLOCAL in options.c_cflag ?
What flow control, baud, parity, stop bits, ...

Pádraig.



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