From: Liam Bedford (lbedford at domain lbedford.org)
Date: Wed 20 Jun 2001 - 17:26:14 IST
On Wed, Jun 20, 2001 at 05:19:02PM +0100, HAMILTON,DAVID (HP-Ireland,ex2) came forth with:
> Niall,
>
> You are correct in most of this. The following paragraph is from AMD's web
> site:
>
> A key advantage of AMD's multiprocessing platform is Smart MP technology,
> which greatly enhances overall platform performance by increasing data
> movement between the two CPUs, chipset and memory system. Smart MP
> technology features dual point-to-point, high-speed 266MHz system buses with
> Error Correcting Code (ECC) support designed to provide up to 2.1GB per
> second per CPU of bus bandwidth in a dual-processor system. Smart MP
> technology also has an optimized Modified Owner Exclusive Shared Invalid
> (MOESI) cache coherency protocol that manages data and memory traffic in a
> multiprocessing environment.
>
> As you can see, the new chips have been optimised and modified in order to
> function reliably and efficiently in a MP environment.
>
But don't forget, they're actually all part of the original Athlon too.
It's just AMD don't want people to know that.
L.
-- Liam Bedford | Four thousand holes in Blackburn, Lancashire Software Engineer | And though the holes were rather small WBT Systems, Block 2, | They had to count them all Harcourt Centre, Harcourt St. | Now they know how many holes it takes to fill 01-4170100 | The Albert Hall
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