From: Dave Airlie (airlied at domain csn.ul.ie)
Date: Wed 15 Aug 2001 - 16:32:14 IST
My ventures into MIPS assembler started from x86 where x==80 :-), and also
z80, along with some 32-bit x86, and I just assumed it was normal and
linear until someone on a list pointed this out to me .. it's a good thing
as fasr as chips go .. it's a bitch as far as reading MIPS asm blindly
goes.. I knew nada about it at that time..
On Wed, 15 Aug 2001, Paul Jakma wrote:
> On Wed, 15 Aug 2001, Dave Airlie wrote:
> > I've only one thing to say...
> > branch delay slots ... *shudder*....
> > in pseudo dave-assembly (a combination of C, VAX/MIPS/x86/ARM asms)
> > mov 56, r1 # put 56 into r1
> > br label # branch to label
> > inc r1
> > label: printf r1
> > guess what r1 is at this stage? 56 taking bets? no it's 57... the increase
> > instruction gets executed... it still makes my brain violently ill even 2
> > or 3 years later (and I'm no longer active on Linux/MIPS)...
> hmmm.. what's the correct way to do above then? (and is there a good
> reason for it?)
> >From the tiny tiny bit¹ that i do know of MIPS asm, you are required
> to know scheduling and ordering requirements.... it's all laid bare.
> > Dave.
> ¹ playing around with tiny C progs and comparing the difference in the
> resultant x86 and MIPS asm.
-- David Airlie, Software Engineer http://www.skynet.ie/~airlied / airlied at domain skynet.ie pam_smb / Linux DecStation / Linux VAX / ILUG person
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